Lookahead carry unit

Template:Short description A lookahead carry unit (LCU) is a logical unit in digital circuit design used to decrease calculation time in adder units and used in conjunction with carry look-ahead adders (CLAs).

4-bit adder

A single 4-bit CLA is shown below:

4-bit adder with Carry Look Ahead (CLA)

16-bit adder

By combining four 4-bit CLAs, a 16-bit adder can be created but additional logic is needed in the form of an LCU.

The LCU accepts the group propagate ($P_G$) and group generate ($G_G$) from each of the four CLAs. $P_G$ and $G_G$ have the following expressions for each CLA adder:

$P_G=P_0\cdot P_1\cdot P_2\cdot P_3$

$G_G=G_3+G_2\cdot P_3+G_1\cdot P_2\cdot P_3+G_0\cdot P_1\cdot P_2\cdot P_3$

The LCU then generates the carry input for each CLA.

Assume that $P_i$ is $P_G$ and $G_i$ is $G_G$ from the i^th CLA then the output carry bits are

$C_4=G_0+P_0\cdot C_0$

$C_8=G_4+P_4\cdot C_4$

$C_{12}=G_8+P_8\cdot C_8$

$C_{16}=G_{12}+P_{12}\cdot C_{12}$

Substituting $C_4$ into $C_8$, then $C_8$ into $C_{12}$, then $C_{12}$ into $C_{16}$ yields the expanded equations:

$C_4=G_0+P_0\cdot C_0$

$C_8=G_4+G_0\cdot P_4+C_0\cdot P_0\cdot P_4$

$C_{12}=G_8+G_4\cdot P_8+G_0\cdot P_4\cdot P_8+C_0\cdot P_0\cdot P_4\cdot P_8$

$C_{16}=G_{12}+G_8\cdot P_{12}+G_4\cdot P_8\cdot P_{12}+G_0\cdot P_4\cdot P_8\cdot P_{12}+C_0\cdot P_0\cdot P_4\cdot P_8\cdot P_{12}$

$C_4$ corresponds to the carry input into the second CLA; $C_8$ to the third CLA; $C_{12}$ to the fourth CLA; and $C_{16}$ to overflow carry bit.

In addition, the LCU can calculate its own propagate and generate:

$P_{LCU}=P_0\cdot P_4\cdot P_8\cdot P_{12}$

$G_{LCU}=G_{12}+G_8\cdot P_{12}+G_4\cdot P_8\cdot P_{12}+G_0\cdot P_4\cdot P_8\cdot P_{12}$

$C_{16}=G_{LCU}+C_0\cdot P_{LCU}$

16-bit adder with LCU

64-bit adder

By combining 4 CLAs and an LCU together creates a 16-bit adder. Four of these units can be combined to form a 64-bit adder. An additional (second-level) LCU is needed that accepts the propagate ($P_{LCU}$) and generate ($G_{LCU}$) from each LCU and the four carry outputs generated by the second-level LCU are fed into the first-level LCUs.

64-bit adders with a second-level LCU

References

• Template:Cite book
• Template:Cite book